The field of the invention relates generally to oscillator circuits, and more particularly to voltage-controlled ring oscillators used for high-frequency communications.
The current high-growth nature of digital communications demands higher speed serial communication circuits. Present day technologies barely manage to keep up with the present need to communicate at high speeds, e.g. gigabit, terabit, and higher transmission speeds. New techniques are needed to ensure that methods for serial communication can continue to expand and grow.
Multiplexers are typically used in communication systems to multiplex lower rate data signals onto a higher rate channel. Examples of communication systems include optical communication systems (e.g. SONET communication systems) which multiplex multiple data streams onto a single channel in a serial manner. Other communication system types also use multiplexers, such as communication devices that operate in LANs, internal communication systems of a computer system, processors of a multiprocessor system, and the like.
Oscillators are used in communication systems to provide clocking signals used for transmitting data. In particular, ring oscillators have been used as part of an output retiming circuit of a serial communication system to clock data.
According to one embodiment of the invention, a ring oscillator is provided that includes a number of stages, each of the stages being coupled to an output of at least two previous stages. This architecture is referred to hereinafter as a xe2x80x9cfeed forwardxe2x80x9d architecture, as signals are fed forward to further stages beyond a consecutive stage. Any number of stages may be used. This architecture represents a new topology for ring oscillator design, as ring oscillators generally include consecutive stages that each have an input from the previous stage only. In general, such an architecture achieves higher frequencies than oscillators without feed forward paths.
For example, a ring oscillator according to one aspect of the invention may contains four stages, each stage having an input derived from the outputs of the previous two stages. This configuration increases the maximum frequency of operation over conventional ring oscillators by 50%. Variable delay in such a configuration may be achieved, for example, through a voltage-controlled weighting of previously generated signals. Frequency may be controlled by varying a delay through each stage, and the delay of each stage may depend, for example, on a variable weighting between the two previous stages"" outputs. Such a ring oscillator consumes as much power as a conventional four stage ring oscillator, yet operates a higher frequencies and with less noise due to averaging effects.
In particular, a Feed Forward Interpolated Voltage Controlled Oscillator (FFI VCO), is an improvement over the standard ring oscillator design. First, the design is versatile and adjustments can be made to center frequency, tuning range, and gain, through simple parameter changes. Second, configured for maximum operating speed, it is significantly faster than a simple four stage ring oscillator utilizing the same power. This increase in speed can be traded for additional phase noise and jitter suppression. A reduction in phase noise makes an FFI VCO according to various aspects of the invention a viable alternative to LC tanks when used in short-haul communication channel.
According to one aspect of the present invention, a feed forward oscillator according to various embodiments of the invention may be part of a communication system having a serial data transmission circuit. More particularly, there are conventional serial data transmission circuits that utilize an output retiming circuit, and require clocking at the same frequency as the output bit rate. At bit rates above, for example, 10 Gb/s, this conventional method becomes prohibitive, because of the lack of Voltage Controlled Oscillators (VCOs) capable of operating at this speed. According to one aspect of the invention, a serial data transmission circuit may implement a symmetric multiplexer with a ring oscillator according to various aspects of the present invention to transmit data. The multi-phase nature of ring oscillators enables the serial data transmission circuit to use a clock frequency, for example, of one-quarter the 20 Gb/s bit rate, or 5 GHz. This example communication technique implements two signals in quadrature from a VCO.
According to one aspect of the invention, an oscillator is provided comprising a plurality of buffer stages, each of which having an output that is coupled to inputs of at least two respective buffer stages of the plurality of buffer stages. According to one embodiment of the invention, at least one of the buffer stages includes an input from a first previous stage and an input from a second previous stage arranged previous with respect to the first previous stage. According to one embodiment of the invention, the oscillator further comprises a control for adjusting a delay in at least one of the plurality of buffer stages. According to one embodiment of the invention, the oscillator includes four buffer stages. According to one embodiment of the invention, the control includes varying a weighting between the input from the first previous stage and the input from the second previous stage. According to one embodiment of the invention, an adjustment of delay produces an adjustment in output frequency of the oscillator.
Further features and advantages of the present invention as well as the structure and operation of various embodiments of the present invention are described in detail below with reference to the accompanying drawings. In the drawings, like reference numerals indicate like or functionally similar elements. Additionally, the left-most one or two digits of a reference numeral identifies the drawing in which the reference numeral first appears.